Built In Self Test
A basic BIST design consists of the following components,
1.BIST controller
2.CUT (circuit under test) (in our case it is RAM)
3.Test pattern generator
4.Response verification
5.Testbench to verify the functionality of the above BIST design
In case of our implementation CUT is a SRAM, so it is required to design and implement a small SRAM for testing.
BIST controller has to access the SRAM for sending the test pattern and verify the output of the CUT. Based on the verification results a self repairing technique needs to be incorporated.
We will be sharing the sample verilog code for the above design Soon.
1.BIST controller
2.CUT (circuit under test) (in our case it is RAM)
3.Test pattern generator
4.Response verification
5.Testbench to verify the functionality of the above BIST design
In case of our implementation CUT is a SRAM, so it is required to design and implement a small SRAM for testing.
BIST controller has to access the SRAM for sending the test pattern and verify the output of the CUT. Based on the verification results a self repairing technique needs to be incorporated.
We will be sharing the sample verilog code for the above design Soon.
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